Embedded Target for RH850 Multicore

Model-based environment for generating multicore source code for RH850 devices from Simulink models

Highlights

  • Integrated development environment for RH850 single core and multicore MCUs
  • Integrated project management capabilities and instruction set simulator 
  • Generation of parallel source code with Embedded Coder for RH850 devices from Simulink models
  • Automatic generation of processor-in-the-loop co-simulation (PILS) environments
  • Early estimation of performance in execution on multicore RH850 devices at the modeling phase with Simulink
  • Graphical display of the states of execution for each of the CPUs in subsystem units (block performance analysis)

Description

Embedded Target for RH850 Multicore

Workflow for automatically generating parallel source code for the RH850 from Simulink models

Embedded Target for RH850 Multicore is a model-based environment for multicore RH850 devices. It can simplify complex driving controls for the autonomous-driving era. In addition to the multicore support of the PILS tool for the automatic configuration of environments and support for block performance analysis, it is also interoperable with the model-based parallelization tool of product from eSOL Co., Ltd. (sold separately).

Simulink users who want control over the CPU cores assigned for each subsystem can designate this through the CPU core assignment designation form on the Simulink control model. When doing so, a parallelized intermediate model is automatically generated. The product is also interoperable with the eMBP Adaptor for Renesas PILS, a model-based parallelization tool from eSOL. This tool will automatically search for optimal CPU core.

Embedded Target for RH850 then generates parallel source code from the parallelized intermediate model, using Embedded Coder®, and automatically handles compilation with the Renesas compiler bundled with the CS+ integrated development environment from Renesas or the Green Hills® Software compiler. The compiled code is executed on the multiple cores set up in the CS+ simulator (or on the microcontroller itself), and simulated in coordination with plant models executed under Simulink.

After running the simulation, the user has a multicore execution profile, where the states of execution per core for each subsystem are displayed as a graph, and this can be checked for the worst execution times and the processing margins of the control cycle.

Embedded Target for RH850 will also have a variant for use with single-core RH850 MCUs and will not include the parallelization function. Please visit the product page on the Renesas Website for more information.

Renesas also provides the Embedded Target for Renesas CS+, which has more limited functionality, for products of the RX, RL78, and other MCU families.

renesas

Renesas Electronics Corporation

TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku,
Tokyo 135-0061,
JAPAN
www.renesas.com

Required Products

Platforms

  • Windows

Support

  • E-mail
  • Telephone

Product Type

  • Embedded Hardware - MCU, DSP, FPGA
  • Embedded Software - Tools, IDE, RTOS

Tasks

  • Control Systems
  • Digital Signal Processing
  • Embedded Systems
  • Process Control and Monitoring
  • Real-Time Systems

Industries

  • Automotive
  • Computer Electronics
  • Industrial Automation and Machinery
  • Semiconductor